"Avago's multi-gigabit SerDes cores meet our stringent performance requirements," said R.K. Anand, executive VP of Foundation Technologies at Juniper Networks. "Cutting edge IP from Avago for SerDes and high-speed I/O are essential technologies that enable us to deliver solutions in silicon for our customers."

"We are committed to providing solutions that meet our customers' growing requirements for speed, density, power, and execution," said Frank Ostojic, VP and general manager of Avago's ASIC Products Division. "We are delighted that Juniper has chosen Avago to engage so closely on such breakthrough projects that enable us to showcase our embedded SerDes leadership within the industry and meet Juniper's needs of performance and scale for their new product."

Avago is a supplier of analog interface components for communications, industrial and consumer applications. By leveraging its core competencies in III-V compound and silicon semiconductor design and processing, the company provides a range of analog, mixed signal and optoelectronics components and subsystems to approximately 40,000 end customers.

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"We are committed to objectively testing networking solutions with the strictest methodology and were honored to be the first lab commissioned to evaluate these solutions," said Carsten Rossenhoevel, managing director at EANTC. "Our analysis confirmed Juniper's Junos Trio chipset is setting new standards for performance, services and scalability, while providing a significant improvement in power efficiency."

The completed tests from EANTC confirm the performance metrics of the MX480 3D Universal Edge Router, including a validated up to 1.4Tbit/s, 240Gbits/s per slot unidirectional, with throughput able to exceed one billion packets per second, in a compact sixth of a rack configuration. Additionally, services scale displayed 6,000 active Layer 3 VPNs and 6,000 active VPLS instances, as well as a 25.34 watts per 10GbE and 3.38 watts per gigabit of throughput in full configuration.

The chipset will be delivered in Juniper's new MX Series 3D routers, providing "Universal Edge" routing for business, residential and mobile services at massive scale on a single network.

Juniper's MX Series 3D products are available starting December 2009. The MX Series 3D 16-port 10GbE aggregation line card will be generally available to customers in December 2009, with additional MX Series 3D products coming throughout 2010.

The European Advanced Networking Test Center (EANTC) offers vendor-neutral consultancy and test facilities for network equipment manufacturers, service providers and enterprise customers. Primary business areas include interoperability, conformance, and performance testing for Carrier Ethernet, IP/MPLS, and Triple Play technologies and applications.

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"We went with the Calibre verification platform because it gives a high level of confidence in the manufacturability of our design," said Debashis Basu, senior director of Foundation Technologies at Juniper Networks. "With a design of this size, we needed a solution that could deliver fast turnaround time. The Calibre user interface environment and scripting capability helped us to find and debug problems quickly, and automate chip assembly."

Juniper employed a combination of Mentor's embedded deterministic test pattern generation and memory BIST products to meet demanding test requirements. With hundreds of separate embedded memories, Juniper's design presented a real test challenge to minimize routing congestion, enable at-speed testing, and keep real estate required for BIST controllers to a minimum. Juniper was able to achieve their objectives using Mentor's modular test flow, embedded deterministic pattern compression, and memory BIST technology.

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Expected next investor conference call information:
Conference Call Date: 10/22/2009
Conference Call Time (ET): 4:45 PM
Conference Call URL: http://www.vcall.com/CoLocated.asp?ID=149989&source=wshorizon&urlID=150365&playerID=1