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With the new high-performance broadcast connectivity platform, broadcast equipment engineers can rapidly build multi-protocol broadcast systems that require high-bandwidth, low-power serial connectivity interfaces. Multiple channels of standard definition (SD), high definition (HD), and 3G-SDI video can be implemented in a single Virtex-6 device that includes up to 24 power-optimized high-speed transceivers supporting line rates of up to 6.5Gbps. Xilinx is showcasing the Broadcast Connectivity Targeted Design Platform at InterBEE 2009 November 18th through November 20th, featuring live demonstrations in Xilinx Booth 6115 in Hall 6 at the Makuhari Messe in Tokyo.

Delivering Optimized Broadcast Connectivity

The Broadcast Connectivity Targeted Design Platform will be delivered in a complete Broadcast Connectivity Kit that makes it easy to build audio and video interfaces right out of the box with the latest generation Virtex-6 FPGAs. The kit integrates a Virtex-6 LX240T device on the ML605 evaluation board, an industry-standard FPGA Mezzanine Card (FMC) supporting digital audio and video interfaces and bridging technologies, complete ISE(R) Design Suite Logic Edition software development environment, and Targeted Reference Designs for implementing SDI interfaces based on Society of Motion Picture and Television Engineers (SMPTE) standards, including triple rate SDI transmit, receive, and pass-through designs. The kit also provides full documentation to enable rapid system-level evaluation of performance, power, and design trade-offs.

"Broadcast equipment developers are pressured to get to market first with systems that offer the highest performance and most features, and meet the latest standards and stringent power budgets," said Ben Runyan, senior manager of broadcast marketing at Xilinx. "Our broadcast connectivity kit gives developers a head-start on building the standard audio and video interfaces their systems need on Virtex-6 FPGAs. They can get their jobs done faster and spend more time focused on creating value to better differentiate their products."

Targeted Reference Designs

The triple rate SDI designs provided with the kit leverage the excellent jitter performance of the Xilinx GTX serial transceivers in meeting SMPTE standards for transmit, receive, and pass-through of uncompressed digital video. The interface designs support all the typical SDI rates ranging from 270Mbps (SD) to 1.485Gbps (HD) and 2.97Gbps (3G) with their 1/1.001 derivatives, and are shown to perform much better than the receive jitter and transmission jitter requirements established by SMPTE standards. Optional clock cleaning circuitry is provided for even better jitter performance, particularly for pass-through designs.

Developers can get started quickly using the Targeted Reference Designs to meet application-specific interface requirements and design goals. With the ability to design Virtex-6 FPGA systems-on-chip with one or multiple channels of SD, HD and 3G-SDI video, developers can readily evaluate the performance, cost, and power advantages of Virtex-6 FPGAs for the targeted applications. The Targeted Reference Designs with the ML605 board/FMC card also serve as the starting point to jumpstart product development with a level of system integration that reduces bill-of-materials cost for silicon and enables savings in overall power, thermal management, and board real estate as compared to using external SERDES devices.

Scalable Broadcast FMC

The new Broadcast FPGA Mezzanine Card (FMC) supports a variety of audio and video interfaces and can be scaled to accommodate emerging standards and custom protocols, such as DisplayPort, Ethernet AVB, and 10Gb Ethernet. The Broadcast FMC combines multiple SD/HD/3G-SDI and DVB-ASI inputs and outputs with multiple AES audio interfaces and reference clocks through BNC connectors, with clock-cleaning circuit modules available to enable the best jitter performance. Using the Broadcast FMC in conjunction with the ML605 base board, developers can bridge from ASI to Ethernet for video over IP, triple rate SDI to PCI Express(R) for video streaming in and out of computers, and triple rate SDI to 10Gb Ethernet for high bit-rate video over IP links.

Pricing & Availability

The Virtex-6 FPGA Broadcast Connectivity Kit will be available starting in January 2010 priced at US$4,995 from the Xilinx web site or distributors at: www.xilinx.com/v6bck. The kit comes complete with all the documentation, cables, and power supplies needed to get started. The ISE Design Suite Logic Edition included with the kit is device locked to the Virtex-6 LX240T-FF1156 FPGA. For more information about the ISE software suite, visit: www.xilinx.com/ISE.

About Xilinx in Broadcast

Xilinx is the worldwide leader in programmable logic solutions offering a wide array of capabilities for the broadcast industry, ranging from video, audio, and network connectivity; real-time high definition video processing; and high-speed digital signal processing for transmission and modulation. These capabilities are delivered as part of Xilinx Targeted Design Platforms that enable developers to accelerate time to market and achieve greater innovation and differentiation of sophisticated broadcast systems. For more information on how to lower cost of ownership and lengthen time in market of broadcast products, visit www.xilinx.com/broadcast.

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XILINX, the Xilinx logo, Virtex, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI Express is trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.

    Editorial Contacts:
    Silvia Gianelli                          Miyuki Takegoshi
    Xilinx, Inc. Public Relations            Xilinx Public Relations Japan
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SOURCE Xilinx, Inc.

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The eLab series covers solutions and a best practices approach for powering FPGA design considerations in 5-15-minute installments. The videos follow a discussion format and include product demonstrations where appropriate. "Meeting the Power Requirements for Xilinx Spartan-6 and Virtex-6 Families" kicks off the series - subsequent installments feature real-world design examples using Xilinx's Power Estimator spreadsheet tool and a TI Fusion GUI Demonstration.

"The philosophy behind the series is to demonstrate recommended design methodology for FPGA system power supply, and includes design information from Xilinx, tools/devices from TI, and practical design considerations from Avnet," said Jim Beneke, VP of global technical marketing for Avnet Electronics Marketing. "While these best practices should apply to any processor, Avnet has selected to demonstrate some of the specific examples with the new Xilinx Spartan-6 and Virtex-6 evaluation boards."

Replays of all the eLab videocasts are available at:

http://www.em.avnet.com/fusionelab

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"This is the fourth time that Xilinx Targeted Design Platforms have been recognized by a top tier trade publication in China (TDP) since their unveiling in February, which underscores the importance the industry has placed on the need for new methodologies that move FPGAs further into mainstream systems development," said Xilinx Vice President for Xilinx Product and Solutions Management, Mustafa Veziroglu. "While the Virtex-6 family raises the bar for industry-leading FPGA technology, our Targeted Design Platforms are a significant new change for us in the way we're delivering programmable logic to designers."

As one of China's premier technology awards, the EDN China Innovation Awards are widely regarded as among the industry's most coveted honors. The 2009 EDN China Innovation Product Awards were chosen by a committee comprised of technology managers, researchers and an EDN China editor and handed out at an awards dinner in Shenzhen on Nov. 18. The committee reviewed 181 nominations from 95 companies. The Xilinx Virtex-6 FPGA and Xilinx Target Design Platform were recognized in the Microprocessor, DSP and PLD category.

The Virtex-6 family is the high-performance silicon foundation for Xilinx Targeted Design Platforms. Consuming 50 percent lower power and delivering 20 percent lower cost than the previous generation, the new family is built with the right mix of programmability, integrated blocks for digital signal processing (DSP), memory, and connectivity support - including PCI Express(R) 2.0 compliant interface blocks and high-speed transceivers supporting line rates beyond 11Gbps to satisfy the insatiable demand for higher bandwidth and performance. Providing 15 percent higher performance and 20 percent lower power consumption compared to competitive offerings, the new family operates on a 1.0v core voltage with a 0.9v low-power option. These advances enable system architects to integrate Virtex-6 FPGAs into their designs to enable 'green' central offices and data centers, which is particularly relevant for the telecommunications industry as it deploys new technologies to support the demand for internet video and rich media content.

Introduced by Xilinx with its Virtex-6 and Spartan(R)-6 FPGA families, Targeted Design Platforms provide embedded, DSP, and hardware designers alike with access to a wide array of silicon devices supported by open standards, common design flows, IP, development tools, and run-time platforms. The new Virtex-6 FPGA and Spartan-6 FPGA Evaluation Kits announced in June were the first in a series of kits Xilinx plans to offer as part of the Targeted Design Platform strategy that enable designers to get started right out of the box with their evaluation and development of systems. These kits provide all the elements needed to design right out of the box, so both new and experienced FPGA users can achieve the best performance, lowest power, highest bandwidth, and most feature-rich utilization. In addition, the built-in scalability and plug-in expandability of the base targeted design platform kits lay the foundation for rapid deployment by Xilinx of domain-specific platform kits targeting connectivity, embedded, and DSP applications.

Designers can learn more about Xilinx Targeted Design Platforms by attending X-fest, a global series of free technical seminars sponsored by Avnet and Xilinx. These free one-day seminars offer practical training for engineers. To register for an X-fest event, visit www.weboom.com/avnet.

About EDN China Innovation Awards

Now in its 19th year, the EDN Innovation Awards honors the products and people that have shaped the electronics industry over the past year. It has become the most prestigious award in the electronics design engineering category in the North America Region. In 2005, this award was introduced in China by EDN China to an overwhelming response among engineers, academics and the electronics industry as a whole. A combination of votes from experts and design engineers determines the winners of the year, who will also win an honor in the China market. Like the EDN Innovation Awards, the EDN China Innovation Awards is also held annually.

About Xilinx

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.

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XILINX, the Xilinx Logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.

    Bruce Fienberg
    Xilinx, Inc.
    408-879-4631
    bruce.fienberg@xilinx.com

SOURCE Xilinx, Inc.

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