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Mixel, Inc. Mixed-Signal Excellence - Mixed Signal IP
Mixel, Inc. leading provider of high performance analog and Mixed-signal semiconductor Intellectual Property cores .
Aeluros, Inc.
Quick Search Home 10G PHY (X2 Modules) 10G PHY (XENPAK Modules) 10G PHY (XPAK Modules) XFI to XAUI PHY (Line Cards) XFI to XAUI PHY (NICs/HBAs) SATA-II IP CORE XAUI IP CORE PCIe IP CORE “Aeluros has continued its track record of delivering industry leading performance and integrated functionality
Snowbush IP
Gennum's Snowbush IP Group is exclusively focused on the design and delivery of silicon-proven, high-speed serial interface IP and offers the industry's most robust, widely-deployed, production-tested and customizable family of IP cores for today's most demanding high-speed serial communication
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HSIC-compatible PHY IP delivers power, area savings
The HSIC standard fully supports 480Mbit/s data transfer of the USB protocol. It eliminates 3.3 and 5V signaling, delivering huge silicon area and power savings in comparison to standard cable USB 2.0.
Evatronix Enhances its USB Portfolio with High Speed Inter-Chip (HSIC) Compatible PHY IP
Evatronix Enhances its USB Portfolio with High Speed Inter-Chip (HSIC) Compatible PHY IP. Direct chip-to-chip interconnect allows significant power and silicon area savings while retaining all performance features of the USB 2.0 standard. - PR11301642
VTech Licenses Bluetooth IP from NewLogic Technologies
VTech Communications Inc. and NewLogic Technologies AG have struck a licensing deal that will allow Beaverton, Ore.-based VTech to use Lustenau, Austria-based NewLogic's BOOST core and BOOST software Bluetooth intellectual property (IP). The terms of the deal were not disclosed. VTech will add the
Tektronix - Scopes get support for MIPI D-PHY standard and UART/RS-232 software
A series of enhancements to its popular DPO7000 Series oscilloscopes hasbeen announced by Tektronix, including support for the Mobile IndustryProcessor Interface (MIPI) D-PHY standard and new UART/RS-
Virage Logic s Solution Supports RDC's SoC Design at 65nm Process
Virage Logic s Solution Supports RDC's SoC Design at 65nm Process
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