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Altera Secures Your Design With Cyclone III LS FPGA Development Kit
News | www.altera.com | 5 hours 58 minutes ago
The anti-tamper design example included in the kit uses an external Altera® MAX® II CPLD as a configuration manager that accesses the passive and active security features.
http://www.altera.com/corporate/news_room/releases/2009/products/nr-ciii_ls_dev_kit.html?f=hp&k=wn1
OCP-IP Releases OCP 3.0 Specification
News | www10.EDACafe.com | Nov 19, 2009
REDWOOD CITY, Calif. (BUSINESS WIRE) November 19, 2009 Open Core Protocol International Partnership (OCP-IP) today
http://www10.EDACafe.com/nbc/articles/view_article.php?articleid=763807
Automotive-qualified IGBT Features Improved Thermal Performance, Higher Reliability | EDNAsia.com
News | www.ednasia.com | Nov 19, 2009
Automotive-qualified IGBT Features Improved Thermal Performance, Higher Reliability
Virage Logic Introduces New Product for Post Silicon Bring Up and System Debug (Virage Logic)
Press Release | investors.viragelogic.com | Nov 19, 2009
Virage Logic Introduces New Product for Post Silicon Bring Up and System DebugFrom: Virage LogicType: Press Release
http://investors.viragelogic.com/releasedetail.cfm?ReleaseID=424989
Actel Expands RTAX-DSP FPGAs with New Configurable DSP IP Cores
News | www.actel.com | Nov 18, 2009
Actel's highly configurable DSP IP cores provide easy implementation of complex DSP functions within RTAX-DSP Space-Flight FPGAs
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Xilinx Virtex-6 Family and Targeted Design Platforms Both Recognized as Leading Technologies in 2009 EDN China Innovation Awards (PR Newswire)
Press Release | finance.yahoo.com | Nov 18, 2009
SAN JOSE, Calif., Nov. 18 /PRNewswire/ -- Xilinx, Inc. (Nasdaq: XLNX - News) today announced that its high-performance 40-nm Virtex®-6 FPGA family and its Targeted Design
http://finance.yahoo.com/news/Xilinx-Virtex6-Family-and-prnews-3339093249.html?x=0&.v=1
Easic enhances Etools software
News | www.electronicstalk.com | Nov 18, 2009
Easic Corporation has announced the immediate availability of its Etools 8.0 software suite for implementing 45nm Nextreme-2 designs.
Latest eASIC design suite targets 45-nm designs
Press Release | www.edadesignline.com | Nov 18, 2009
Structured ASIC vendor eASIC announced the immediate availability of its eTools 8.0 software suite for implementing 45-nm designs with its Nextreme-2 ASICs.
http://www.edadesignline.com/221900204?cid=RSSfeed_EDAdesignline_edadlALL
Xilinx Virtex-6 Family and Targeted Design Platforms Both Recognized as Leading Technologies in
Press Release | www.zibb.com | Nov 18, 2009
Xilinx, Inc. (Nasdaq: XLNX) today announced that its high-performance 40-nm Virtex(R)-6 FPGA family and its Targeted Design Platforms were each named "Leading Products" in this year's annual EDN China Innovation Awards. The award recognizes Xilinx's technical leadership in delivering both
Aldec announces Low-cost Linux RTL and Gate-level Simulator (Aldec)
News | www.aldec.com | Nov 17, 2009
FPGA & ASIC - Electronic Design Verification and Simulation Software for SystemC, VHDL, Verilog, SystemVerilog, Assertions, EDIF, MATLAB/Simulink
http://www.aldec.com/Company/News.aspx?newsid=8b321269-6413-429c-aa65-e6dbd15dda18
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