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TechOnline | Using Multichannel DRAM Subsystems to Create Scalable Architectures for Video SoCs

Sonics Application Architect Pascal Chauvet will present how a multichannel DRAM subsystem can provide a scalable and memory efficient solution for the next generation of Video SoCs. Topics include digital video architecture requirements, DRAM efficiency issues when moving to DDR3, multichannel

TechOnline | Avoiding the Landmines When Using a DDR Interface on your Next SoC

More and more SoCs are turning to the "almost free" DDR2 or DDR3 SDRAM to satisfy their off-chip memory storage requirements for their SoC designs. OK, DRAMs may cost a buck or two each but most SoC designers are unfamiliar with the realities of the DRAM market. Unless you are a regular attendee at

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