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ICONICS, Inc.
A Microsoft publication on Windows 7 for Industrial Automation and manufacturing. Topics include light up features and how organizations are adopting Windows 7.
TechOnline | Assessing the Impact of Real World Lithography Variation
This paper investigates variability across multiple lithographic domains, as experienced in typical manufacturing environments, and assesses the impact on achievable post-OPC image fidelity and CD co
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TechOnline | The Use of EUV Lithography to Produce Demonstration Devices
In this paper, we describe the integration of Ultra Violet (EUV) lithography into a standard semiconductor manufacturing flow to produce demonstration devices. 45 nm logic test chips with functional transistors were fabricated using EUV lithography to pattern the first interconnect level (metal 1).
TechOnline | DFM in Action - FPGA Chip performance Improvement with Gate Shrink through Alternating
In the post-physical verification space called 'Mask Synthesis' a key component of design-for-manufacturing (DFM), double-exposure based, dark-field, alternating PSM (Alt-PSM) is being incr
TechOnline | MDP In A Nutshell
When an IC design has been physically verified and is past the application of resolution enhancement technologies, such as optical and process correction (OPC), the design is ready to move on to the
TechOnline | Real-time VT5 Model Coverage Calculations During OPC Simulations
For a robust OPC solution, it is important to isolate and characterize the detractors from high quality printability. Failure in correctly rendering the design intent in silicon can have multiple causes. Model inability in predicting lithographic and process implications is one of them. Process
TechOnline | Understanding the Impact of Rigorous Mask Effects in the Presence of Empirical Process
This paper discusses some practical aspects of integrating a mask modeling solution into the Optical Proximity Correction (OPC) framework. Specifically, investigations were performed to understand to what degree empirical process models used in OPC can compensate for mask effects when a Kirchhoff
TechOnline | AIMS-45 image validation of contact hole patterns after inverse lithography at NA 1.35
The AIMS-45, when used in scanner mode, can emulate image intensity as seen in resist on the wafer at scanner illumination conditions.
TechOnline | SEM-Based Data Extraction for Model Calibration
The model calibration process in a resolution-enhancement technique (RET) flow is one of the most critical steps towards building an accurate OPC recipe. RET simulation platforms use models for predicting latent images in the wafer due to exposure of different design layouts. Accurate models can
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